| Aleksandra Smiljanić | |||
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Programming of the Communication Hardware
In this course, students will implement networking functions into the programmable hardware. Networking functions that will be considered are the packet classification, buffer control, IP route lookup, network security algorithms etc. These functions are implemented within packet switches, routers, firewalls and other networking equipment that require fast data processing. In the first part of the course, students will be introduced with the tools used for the design of the FPGA devices provided by the well known vendors such are Altera and Xilinx. Then, basics of programming languages VHDL and Verilog will be taught. Also, the network processors for the packet processing at input/output ports of the networking equipment will be presented. The architecture of the network processors offered by the most prominent vendors (e.g. Intel or Agere) will be briefly described. Finally, implementation of the networking functions will be explained.
Introduce students to the languages VHDL and Verilog. Introduce students to the tools for designing FPGA devices. Introduce students to the tools for designing network processors. Train students to implement basic communications functions onto the programmable hardware.
Course comprises lectures and compulsory labs. A midterm exam should be passed as the lab participation requirement. It carries 10 points. Three students on a team will be working on their project. Project comprises implementation of the networking function on the Altera's FPGA chip. The written report and the oral presentation of the project are graded. The written exam carries 40 points and the oral exam carries 60 points. Grades 6,7,8,9,10 correspond to the score ranges: 51-60, 61-70, 71-80, 81-90, 91-110.
| Aleksandra Smiljanić Bulevar Kralja Aleksandra 73 11000 Belgrade, Serbia
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